FIG. 3 is a circuit diagram showing the construction of a prior art differential amplifier for high frequency amplification used in a tuner for TV/VTR. In the figure, transistors Q1 and Q2 constitute a differential amplifier in the preceding stage, in which the bases of these transistors Q1 and Q2 are connected with input terminals 1 and 2, respectively. A transistor Q3 and a resistor R5 constitute a constant current source circuit which is connected between the common emitters of the transistors Q1 and Q2 and ground. Furthermore, resistors R1 and R2 are connected in series between a power supply terminal 7 and ground and a base bias voltage is supplied from the connecting point of the resistors R1 and R2 to the transistor Q1. Similarly resistors R3 and R4 are connected in series between the power supply terminal 7 and ground and a base bias voltage is supplied from the connecting point thereof to the transistor Q2. The collectors of the transistors Q1 and Q2 are connected with the power supply terminal 7 through resistors R6 and R9, respectively.
Transistors Q4 and Q5 constitute a differential amplifier in the succeeding stage. The bases of transistors Q4 and Q5 are connected with the collectors of the transistors Q1 and Q2, respectively. A transistor Q6 and a resistor R10 constitute a constant current source circuit which is connected between the common emitter of the transistors Q1 and Q2 and ground. The collectors of the transistors Q4 and Q5 are connected with the power supply terminal 7 through resistors R7 and R8, respectively.
As clearly seen from the connection relation described above, the circuit constitutes a 2-stage differential amplifier connected in cascade consisting of a preceding stage differential amplifier comprising the transistors Q1, Q2 and Q3 and the resistors R1, R2, R3, R4, R6 and R9, whose inputs are the input terminals 1 and 2, the collectors of the transistors Q1 and Q2 serving as the outputs, and a succeeding stage differential amplifier comprising the transistors Q4, Q5 and Q6 and the resistors R6, R7, R8, R9 and R10, whose inputs are the bases of the transistors Q4 and Q5, the collectors of the transistors Q4 and Q5 serving as the outputs.
The operation of the circuit described above is next explained.
At first, when the power supply Vcc is switched on, voltages are obtained at the connecting point of the resistors R1 and R2 and the connecting point of the resistors R3 and R4, respectively, dividing the power supply voltage Vcc. These voltages are applied to the base of the transistor Q1 and the base of the transistor Q2, respectively. Further the voltage Vcc is applied to the collector of the transistor Q1 through the resistor R6 and to the collector of the transistor Q2 through the resistor R9. If characteristics of the transistors Q1 and Q2 are identical and the base bias voltages applied thereto are equal to each other, the emitter currents of the transistor Q1 and Q2 are also equal to each other, the intensity of which is equal to 1/2 of the collector current of the transistor Q3. Since the transistor Q3 constitutes a constant current source circuit, the collector current thereof is constant and the intensity of this current is determined unequivocally by the voltage Vb1 (arbitrary constant voltage) applied to a terminal 5 and the resistance of the resistor R5.
The voltage Vcc is applied to the bases of the transistors Q4 and Q5 through the resistors R6 and R9, respectively. If the resistances of the resistors R6 and R9 are equal to each other, the DC collector currents of the transistors Q1 and Q2 are equal to each other and therefore the voltage drops across the resistors R6 and R9 are equal to each other. Consequently, the base bias voltages of the transistors Q4 and Q5 are equal to each other and the magnitude thereof is a value obtained by subtracting the voltage drop across the resistor R6 or R9 from the voltage Vcc. Further, the voltage Vcc is applied to the collectors of the transistors Q4 and Q5 through the resistors R7 and R8. If the characteristics of the transistors Q4 and Q5 are identical, the emitter currents thereof are also equal to each other, the intensity of which is equal to 1/2 of the collector current of the transistor Q6. Since the transistor Q6 constitutes a constant current source circuit the collector current thereof is constant and the intensity of this current is determined unequivocally by the voltage Vb2 (arbitrary constant voltage) applied to a terminal 6 and the resistance of the resistor R10.
In the DC operation state as described above, when a balanced high frequency signal is inputted in the terminals 1 and 2, voltages having phases opposite to each other are applied to the bases of the transistors Q1 and Q2. As a result, when the base voltage of the transistor Q1 rises and the emitter current thereof increases, the base voltage of the transistor Q2 decreases and the emitter current thereof decreases. If the base voltage of the transistor Q2 rises and the emitter current thereof increases, the base voltage of the transistor Q1 descends and the emitter current decreases. In accordance with the operations described above, since the sum of the emitter currents of the transistors Q1 and Q2 is kept constant by the action of the constant current source circuit composed of the transistor Q3, currents having a phase difference equal to 180.degree. (opposite phase) and a same amplitude flow through the emitters of the transistors Q1 and Q2. Consequently, the collector currents of the transistors Q1 and Q2 also have phases opposite to each other and therefore an amplified balanced high frequency signal is outputted from the collectors of the transistors Q1 and Q2.
The amplified balanced high frequency signal is inputted from the collectors of the transistors Q1 and Q2 in the preceding stage differential amplifier to the bases of the transistors Q4 and Q5. In this way, voltages having phases opposite to each other are applied to the bases of the transistors Q4 and Q5. As a result, when the base voltage of the transistor Q4 rises and the emitter current thereof increases, the base voltage of the transistor Q5 descends and the emitter current decreases. Since the sum of the emitter currents of the transistors Q4 and Q5 is kept constant by the action of the constant current source circuit composed of the transistor Q6, currents having a phase differential equal to 180.degree. (opposite phase) and a same amplitude flow through the emitters of the transistors Q4 and Q5. Consequently, the collector currents of the transistor Q4 and Q5 also have phases opposite to each other, and therefore an further amplified balanced high frequency signal is outputted from the collectors of the transistors Q4 and Q5.
The prior art circuit described above has drawbacks as described below.
1. Since a constant current source circuit is necessary for each of the stages of the differential amplifier, the circuit is complicated.
2. Since working current flows separately through the preceding stage amplifier and the succeeding stage amplifier current consumption is great and the power supply must be large. Further, associated therewith, heat production is great.
Furthermore, as a method for improving distortion characteristics of the amplifier, it is necessary to increase working current of the transistors and if such increase in the working current is realized, the problem of heat production becomes more significant. In particular, in the case of ICs or LSIs, a problem takes place that heat is apt to be accumulated because of a high density integration and it is difficult to deal with produced heat.
3. Since the total current flowing through the circuit is divided into two parts flowing through the preceding and the succeeding amplifier, unless the capacity of the power supply is considerably great, it is not possible to obtain any satisfactory working current optimizing the distortion characteristics of each of the amplifiers. Consequently the distortion characteristics are poor.